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Procurement of Services for Upskilling Training Program for National Semiconductor Human Resource Development Program Phase-I
Active Tender
Closing Date:
2026-11-23
2026-11-23
Tender Overview
- Category
- Training & Education Services
- Sector
- Services
- Tender Type
- Services
- Procurement Method
- Single Stage Two Envelope, Open Competitive Bidding, Quality and Cost Based Selection (QCBS)
- Submission Method
- E-bids submitted through EPADS v2.0 portal; original bid security hard copy submitted to Pakistan Software Export Board office at IFC Building, 5-A Constitution Ave, F-5/1, Islamabad
- Source Name
- PPRA
Location & Dates
- City
- Islamabad
- Province
- Islamabad Capital Territory
- Country
- Pakistan
- Publish Date
- 2026-11-06
- Closing Date
- 2026-11-23
- Created At
- 2026-11-06 09:05:45
Contact & Websites
- Contact Person
- Project Director
- Contact Phone
- +92-313-228-5032
- Contact Email
- skashif@pseb.org.pk
- Website
- https://epads.gov.pk/opportunities/federal/procurements/174105
- Original Source
- https://epads.gov.pk/opportunities/federal/procurements/174105
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Tender Document
Tender Description
The Pakistan Software Export Board (PSEB), under the Ministry of IT & Telecom, invites bids for the procurement of services for an Upskilling Training Program (USTP) as part of the National Semiconductor Human Resource Development Program (NSHRDP) Phase-I. This initiative aims to build a skilled workforce in semiconductor IC chip design and verification to meet the growing industry demand in Pakistan. The procurement covers delivery of structured, outcome-driven training programs across three geographic Lots: Southern Region (Sindh & Balochistan), Central Region (Punjab), and Northern Region (ICT, KP, AJK & GB).
Items being procured:
- Lot-I: Southern Region training delivery model
- Lot-II: Central Region training delivery model
- Lot-III: Northern Region training delivery model
The training spans approximately 4 months with a maximum of 500 hours, covering foundational to advanced semiconductor design topics including C/C++ programming for hardware engineers, RTL design with Verilog, ASIC design flow, SystemVerilog verification, and UVM methodology. The program includes hands-on labs, project-based learning, and industry-aligned curricula with optional international certifications. Training providers must ensure access to labs equipped with industry-standard EDA tools, qualified trainers, and facilities to accommodate batches of up to 40 trainees.
Eligibility requires consortium participation combining academia, industry, and training providers with proven experience in semiconductor-related training. Bidders must be registered, financially sound, and compliant with FBR and ATL requirements. Bid security and performance guarantees are mandatory. The procurement follows a Single Stage Two Envelope procedure with bids submitted electronically via EPADS v2.0 by November 23, 2026, 03:00 PM, with bid opening at 03:30 PM the same day.
Technical evaluation carries 80% weight and financial evaluation 20%. The contract includes milestones linked to training progress and job placement outcomes. Bidders should carefully review the detailed scope, eligibility, evaluation criteria, and submission instructions available on EPADS portal.
This opportunity is critical for suppliers aiming to contribute to Pakistan's emerging semiconductor ecosystem by delivering high-quality, industry-relevant training services under the auspices of PSEB in Islamabad.
A practical tip for bidders: Ensure your consortium clearly demonstrates regional presence, technical capacity, and industry linkages, and submit complete documentation including detailed training plans, infrastructure evidence, and support letters to maximize technical scoring.
